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商品编号:
HEF4040BT-Q100J
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简述:
Q100 - 12-stage binary ripple counter
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描述:
The HEF4040B is a 12-stage binary ripple counter with a clock input (CP), an overriding asynchronous master reset input (MR) and twelve fully buffered outputs (Q0 to Q11). The counter advances on the HIGH-to-LOW transition of CP. A HIGH on MR clears all counter stages and forces all outputs LOW, independent of CP. Each counter stage is a static toggle flip-flop. Inputs are overvoltage tolerant to 15 V. This enables the device to be used in HIGH-to-LOW level shifting applications.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 3) and is suitable for use in automotive applications.
- 数据手册:
特性
Automotive product qualification in accordance with AEC-Q100 (Grade 3)
Specified from -40 °C to +85 °C
Wide supply voltage range from 3.0 V to 15.0 V
CMOS low power dissipation
High noise immunity
Tolerant of slow clock rise and fall time
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω)
Complies with JEDEC standard JESD 13-B
目标应用
Frequency dividing circuits
Time delay circuits
Control counters
