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    HEF4094B
    HEF4094BT,653
    8-stage shift-and-store register

    • Fully static operation

    • 5 V, 10 V, and 15 V parametric ratings

    • Wide supply voltage range from 3.0 to 15.0 V

    • CMOS low power dissipation

    • High noise immunity

    • Standardized symmetrical output characteristics

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V (C = 200 pF; R = 0 Ω)

    • Complies with JEDEC standard JESD 13-B

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥0.8224

    500+:¥0.7476

    1000+:¥0.7120

    3000+:¥0.6781

    175,000
    2524+
    数据手册
    HEF4093B
    HEF4093BT,653
    Quad 2-input NAND Schmitt trigger

    • Schmitt trigger input discrimination

    • Fully static operation

    • 5 V, 10 V, and 15 V parametric ratings

    • Wide supply voltage range from 3.0 V to 15.0 V

    • CMOS low power dissipation

    • High noise immunity

    • Standardized symmetrical output characteristics

    • Complies with JEDEC standard JESD 13-B

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-B exceeds 200 V

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥0.7694

    500+:¥0.6994

    1000+:¥0.6661

    3000+:¥0.6344

    300,000
    2524+
    数据手册

    限量供应

    74LVC1G125
    74LVC1G125GV,125
    Bus buffer/line driver; 3-state

    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low power consumption

    • IOFF circuitry provides partial Power-down mode operation

    • ±24 mA output drive (VCC = 3.0 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • Complies with JEDEC standards:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥0.2603

    500+:¥0.2366

    1000+:¥0.2253

    3000+:¥0.2146

    181,300
    2422+
    数据手册

    限量供应

    74HC4051
    74HC4051PW,118
    8-channel analog multiplexer/demultiplexer

    • Wide analog input voltage range from -5 V to +5 V

    • CMOS low power dissipation

    • High noise immunity

    • Complies with JEDEC standards

      • JESD8C (2.7 V to 3.6 V)
      • JESD7A (2.0 V to 6.0 V)
    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • Low ON resistance:

      • 80 Ω (typical) at VCC - VEE = 4.5 V

      • 70 Ω (typical) at VCC - VEE = 6.0 V

      • 60 Ω (typical) at VCC - VEE = 9.0 V

    • Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals

    • Typical ‘break before make’ built-in

    • ESD protection:

      • HBM: ANSI/ESDA/Jedec JS-001 Class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/Jedec JS-002 Class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥0.7756

    484+:¥0.4446

    500+:¥0.7050

    1000+:¥0.6715

    3000+:¥0.6395

    180,484
    2347+
    数据手册
    74LVC4245A
    74LVC4245APW,118
    Octal dual supply translating transceiver; 3-state

    • 5 V tolerant inputs/outputs, for interfacing with 5 V logic

    • Wide supply voltage range:

      • 3 V bus (VCC(B)): 1.5 V to 3.6 V

      • 5 V bus (VCC(A)): 1.5 V to 5.5 V

    • CMOS low-power consumption

    • TTL interface capability at 3.3 V

    • Overvoltage tolerant control inputs to 5.5 V

    • High-impedance when VCC(A) = 0 V

    • Complies with JEDEC standard no. JESD8B/JESD36

    • Latch-up performance meets requirements of JESD78 Class 1

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.9439

    500+:¥1.7672

    1000+:¥1.6830

    3000+:¥1.6029

    159,930
    2518+
    数据手册
    74HC164
    74HC164PW,118
    8-bit serial-in, parallel-out shift register

    • Wide supply voltage range from 2.0 to 6.0 V

    • CMOS low power dissipation

    • High noise immunity

    • Input levels:

      • For 74HC164: CMOS level

      • For 74HCT164: TTL level

    • Gated serial data inputs

    • Asynchronous master reset

    • Complies with JEDEC standards

      • JESD8C (2.7 V to 3.6 V)

      • JESD7A (2.0 V to 6.0 V)

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C.

    1+:¥0.6653

    500+:¥0.6048

    1000+:¥0.5760

    3000+:¥0.5486

    47,500
    2515+
    数据手册
    HEF4050B
    HEF4050BT,653
    Hex non-inverting buffers

    • Accepts input voltages in excess of the supply voltage

    • Fully static operation

    • 5 V, 10 V, and 15 V parametric ratings

    • Standardized symmetrical output characteristics

    • Specified from -40 °C to +85 °C

    • Complies with JEDEC standard JESD 13-B

    1+:¥1.0163

    500+:¥0.9239

    1000+:¥0.8799

    3000+:¥0.8380

    42,500
    2434+
    数据手册
    74VHC541
    74VHCT541BQ,115
    Octal buffer/line driver; 3-state

    • Balanced propagation delays

    • All inputs have a Schmitt-trigger action

    • Inputs accepts voltages higher than VCC

    • The 74VHC541 operates with CMOS input level

    • The 74VHCT541 operates with TTL input level

    • ESD protection:

      • HBM JESD22-A114E exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

      • CDM JESD22-C101C exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥1.7062

    500+:¥1.5511

    1000+:¥1.4772

    3000+:¥1.4069

    39,000
    2522+
    数据手册
    74HC4052
    74HC4052D,653
    Dual 4-channel analog multiplexer/demultiplexer

    • Wide analog input voltage range from -5 V to +5 V

    • CMOS low power dissipation
    • High noise immunity
    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • Low ON resistance:

      • 80 Ω (typical) at VCC - VEE = 4.5 V

      • 70 Ω (typical) at VCC - VEE = 6.0 V

      • 60 Ω (typical) at VCC - VEE = 9.0 V

    • Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals

    • Typical ‘break before make’ built-in

    • Complies with JEDEC standards:
      • JESD8C (2.7 V to 3.6 V)
      • JESD7A (2.0 V to 6.0 V)

    • Input levels:

      • For 74HC4052: CMOS level

      • For 74HCT4052: TTL level

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

      • CDM JESD22-C101E exceeds 1000 V

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥0.8041

    500+:¥0.7310

    1000+:¥0.6962

    3000+:¥0.6630

    0
    2523+
    数据手册
    74HC21
    74HC21D,653
    Dual 4-input AND gate

    • Wide supply voltage range from 2.0 to 6.0 V

    • CMOS low power dissipation

    • High noise immunity

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • CMOS input levels

    • Complies with JEDEC standards:

      • JESD8C (2.7 V to 3.6 V)

      • JESD7A (2.0 V to 6.0 V)

    • ESD protection:

      • HBM JESD22-A114E exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C.

    1+:¥0.8031

    500+:¥0.7301

    1000+:¥0.6953

    3000+:¥0.6622

    20,000
    数据手册
    74LVC2G00
    74LVC2G00DC,125
    Dual 2-input NAND gate

    • Wide supply voltage range from 1.65 V to 5.5 V

    • 5 V tolerant outputs for interfacing with 5 V logic

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8-B/JESD36 (2.7 V to 3.6 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • Overvoltage tolerant inputs to 5.5 V

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.1786

    500+:¥1.0714

    1000+:¥1.0204

    3000+:¥0.9718

    18,000
    2424+
    数据手册
    74HC00
    74HC00D,653
    Quad 2-input NAND gate

    • Wide supply voltage range from 2.0 to 6.0 V

    • CMOS low power dissipation

    • High noise immunity

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • Input levels:

      • For 74HC00: CMOS level

      • For 74HCT00: TTL level

    • Complies with JEDEC standards:

      • JESD8C (2.7 V to 3.6 V)

      • JESD7A (2.0 V to 6.0 V)

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥0.5387

    500+:¥0.4897

    1000+:¥0.4664

    3000+:¥0.4442

    17,420
    2512+
    数据手册

    限量供应

    74LVC2G86
    74LVC2G86GT,115
    Dual 2-input EXCLUSIVE-OR gate

    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low-power dissipation

    • ±24 mA output drive (VCC = 3.0 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥0.6244

    500+:¥0.5677

    1000+:¥0.5406

    3000+:¥0.5149

    5000+:¥0.4555

    15000+:¥0.4555

    15,000
    2352+
    数据手册

    限量供应

    74HC4094
    74HC4094PW,118
    8-stage shift-and-store bus register

    • Complies with JEDEC standard JESD7A

    • Input levels:

      • For 74HC4094: CMOS level

      • For 74HCT4094: TTL level

    • Low-power dissipation

    • ESD protection:

      • HBM JESD22-A114F exceeds 2 kV

      • MM JESD22-A115-A exceeds 200 V

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥0.9531

    500+:¥0.8665

    1000+:¥0.8252

    2500+:¥0.4667

    3000+:¥0.7859

    12500+:¥0.4667

    12,500
    2342+
    数据手册
    74AVC4T245
    74AVC4T245PW,118
    4-bit dual supply translating transceiver with configurable voltage translation; 3-state

    • Wide supply voltage range:

      • VCC(A): 0.8 V to 3.6 V

      • VCC(B): 0.8 V to 3.6 V

    • Complies with JEDEC standards:

      • JESD8-12 (0.8 V to 1.3 V)

      • JESD8-11 (0.9 V to 1.65 V)

      • JESD8-7 (1.2 V to 1.95 V)

      • JESD8-5 (1.8 V to 2.7 V)

      • JESD8-B (2.7 V to 3.6 V)

    • ESD protection:

      • HBM JESD22-A114E Class 3B exceeds 8000 V

      • MM JESD22-A115-A exceeds 200 V

      • CDM JESD22-C101C exceeds 1000 V

    • Maximum data rates:

      • 380 Mbit/s (≥ 1.8 V to 3.3 V translation)

      • 200 Mbit/s (≥ 1.1 V to 3.3 V translation)

      • 200 Mbit/s (≥ 1.1 V to 2.5 V translation)

      • 200 Mbit/s (≥ 1.1 V to 1.8 V translation)

      • 150 Mbit/s (≥ 1.1 V to 1.5 V translation)

      • 100 Mbit/s (≥ 1.1 V to 1.2 V translation)

    • Suspend mode

    • Latch-up performance exceeds 100 mA per JESD 78 Class II

    • Inputs accept voltages up to 3.6 V

    • IOFF circuitry provides partial Power-down mode operation

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥2.2214

    500+:¥2.0194

    1000+:¥1.9233

    3000+:¥1.8317

    12,500
    2511+
    数据手册

    限量供应

    74LVT245
    74LVT245D,118
    3.3 V octal transceiver with direction pin; 3-state

    • Wide supply voltage range from 2.7 to 3.6 V

    • 3-state buffers

    • Octal bidirectional bus interface

    • Overvoltage tolerant inputs to 5.5 V

    • Direct interface with TTL levels

    • BiCMOS high speed and output drive

    • Output capability: +64 mA/-32 mA

    • Latch-up protection exceeds 500 mA per JESD78 class II level A

    • Bus-hold data inputs eliminate the need for external pull-up resistors for unused inputs

    • No bus current loading when output is tied to 5 V bus

    • Live insertion/extraction permitted

    • Power-up 3-state

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standards JESD8C (2.7 V to 3.6 V)

    • ESD protection:

      • HBM JESD22-A114E exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Specified from -40 °C to 85 °C

    1+:¥2.1296

    500+:¥1.9360

    1000+:¥1.8438

    2000+:¥0.7694

    3000+:¥1.7560

    10000+:¥0.7694

    10,000
    2348+
    数据手册

    限量供应

    74LVC2G38
    74LVC2G38GXX
    Dual 2-input NAND gate; open drain

    • Wide supply voltage range from 1.65 V to 5.5 V

    • 5 V tolerant outputs for interfacing with 5 V logic

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low power dissipation

    • IOFF circuitry provides partial Power-down mode operation

    • ±24 mA output drive (VCC = 3.0 V)

    • Open-drain outputs

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.3734

    500+:¥1.2486

    1000+:¥1.1891

    3000+:¥1.1325

    10000+:¥0.4715

    10,000
    2325+
    数据手册

    限量供应

    74LVC2G32
    74LVC2G32GXX
    Dual 2-input OR gate

    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low power dissipation

    • 5 V tolerant outputs in the Power-down mode

    • ±24 mA output drive (VCC = 3.0 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.3734

    500+:¥1.2486

    1000+:¥1.1891

    3000+:¥1.1325

    10000+:¥0.4715

    10,000
    2231+
    数据手册

    限量供应

    74LVC2G08
    74LVC2G08GXX
    Dual 2-input AND gate

    • Wide supply voltage range from 1.65 V to 5.5 V

    • 5 V tolerant outputs for interfacing with 5 V logic

    • Overvoltage tolerant inputs to 5.5 V

    • IOFF circuitry provides partial Power-down mode operation

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8-B/JESD36 (2.7 V to 3.6 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥0.6262

    500+:¥0.5693

    1000+:¥0.5422

    3000+:¥0.4695

    10000+:¥0.3506

    10,000
    2326+
    数据手册

    限量供应

    74LVC1G86
    74LVC1G86GX,125
    2-input EXCLUSIVE-OR gate

    • Wide supply voltage range from 1.65 V to 5.5 V

    • High noise immunity

    • Overvoltage tolerant inputs to 5.5 V

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Latch-up performance exceeds 250 mA

    • IOFF circuitry provides partial Power-down mode operation

    • Direct interface with TTL levels

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥0.4693

    500+:¥0.4267

    1000+:¥0.4064

    3000+:¥0.3870

    10000+:¥0.2894

    10,000
    2323+
    数据手册