100 mA output current capability

Built-in bias resistors

Simplifies circuit design

Reduces component count

Reduces pick and place costs

AEC-Q101 qualified

Bidirectional ESD protection of one line

Very low diode capacitance: C_d = 11 pF

Max. peak pulse power: P_PPM = 45 W

Low clamping voltage: V_CL = 12.5 V

Ultra low leakage current: I_RM < 1 nA

ESD protection up to 30 kV

IEC 61000-4-2; level 4 (ESD)

IEC 61000-4-5 (surge); I_PPM = 4.8 A

High switching speed: t_rr ≤ 4 ns

Low capacitance

Low leakage current

Reverse voltage: V_R ≤ 100 V

Repetitive peak reverse voltage: V_RRM ≤ 100 V

Forward current: I_F ≤ 0.5 A

Reverse voltage: V_R ≤ 30 V

Very low forward voltage

Ultra small SMD plastic package

Bidirectional ESD protection of one line

Extremely low diode capacitance C_d = 0.25 pF

Minimized capacitance variation over voltage

ESD protection up to ±10 kV according to IEC 61000-4-2

Ultra small SMD package

High switching speed: t_rr ≤ 50 ns

Reverse voltage: V_R ≤ 200 V

Repetitive peak reverse voltage: V_RRM ≤ 250 V

Small SMD plastic package

Low capacitance: C_d ≤ 5 pF

Repetitive peak forward current: I_FRM ≤ 1 A

AEC-Q101 qualified

Logic-level compatible

Very fast switching

Trench MOSFET technology

ESD protection up to 1.5 kV

AEC-Q101 qualified

Reverse stand-off voltage: V_RWM = 24 V

Low clamping voltage: V_CL= 33 V at I_PP = 3.5 A

Typ. diode capacitance matching: ∆C_d/C_d = 0.1 %

ESD protection up to 30 kV (IEC 61000-4-2)

ESD protection up to 30 kV (ISO 10605; C = 330 pF, R = 330 Ω)

ISO 7637-3: Pulse a: V_S = -150 V / Pulse b: V_S = +100 V

Ultra low leakage current: I_RM < 1 nA

Qualified according to AEC-Q101 / Automotive grade

Bidirectional ESD protection of one line

Extremely low diode capacitance C_d = 0.2 pF

ESD protection up to ±20 kV according to IEC 61000-4-2

Ultra small SMD package

Schmitt trigger input discrimination

Fully static operation

5 V, 10 V, and 15 V parametric ratings

Wide supply voltage range from 3.0 V to 15.0 V

CMOS low power dissipation

High noise immunity

Standardized symmetrical output characteristics

Complies with JEDEC standard JESD 13-B

ESD protection:

• HBM JESD22-A114F exceeds 2000 V

• MM JESD22-A115-B exceeds 200 V

Specified from -40 °C to +85 °C and -40 °C to +125 °C

Wide analog input voltage range from -5 V to +5 V

CMOS low power dissipation

High noise immunity

Complies with JEDEC standards

• JESD8C (2.7 V to 3.6 V)
• JESD7A (2.0 V to 6.0 V)

Low ON resistance:

• 80 Ω (typical) at V_CC - V_EE = 4.5 V

• 70 Ω (typical) at V_CC - V_EE = 6.0 V

• 60 Ω (typical) at V_CC - V_EE = 9.0 V

Logic level translation: to enable 5 V logic to communicate with ±5 V analog signals

Typical ‘break before make’ built-in

ESD protection:

• HBM: ANSI/ESDA/Jedec JS-001 Class 2 exceeds 2000 V

• CDM: ANSI/ESDA/Jedec JS-002 Class C3 exceeds 1000 V

Multiple package options

Specified from -40 °C to +85 °C and -40 °C to +125 °C

High switching speed

Low leakage current

High breakdown voltage

Low capacitance

Reverse stand-off voltage: V_RWM = 27 V

Low clamping voltage: V_CL = 36 V at I_PP = 3 A

ESD protection up to 30 kV (IEC 61000-4-2)

ESD protection up to 30 kV (ISO 10605: C = 330 pF, R = 330 Ω)

ISO 7637-3: Pulse a: V_S = -150 V / Pulse b: V_S = +100 V

Ultra low leakage current: I_RM < 1 nA

Qualified according to AEC-Q101 and recommended for use in automotive applications

Max. peak pulse power: P_PP = 230 W at t_p = 8/20 μs

Low clamping voltage: V_CL = 41 V at I_PP = 5 A

Ultra low leakage current: I_RM < 1 nA

ESD protection up to 30 kV

IEC 61000-4-2, level 4 (ESD)

IEC 61000-4-5 (surge); I_PP = 5 A at t_p = 8/20 μs

AEC-Q101 qualified

High current

Three current gain selections

Rated peak pulse power: P_PPM = 400 W

Reverse standoff voltage range: V_RWM = 24 V

Reverse current: I_RM = 0.001 μA

Small plastic package suitable for surface-mounted design

Very low package height: 1 mm

AEC-Q101 qualified

5 V tolerant inputs/outputs, for interfacing with 5 V logic

Wide supply voltage range:

• 3 V bus (V_CC(B)): 1.5 V to 3.6 V

• 5 V bus (V_CC(A)): 1.5 V to 5.5 V

CMOS low-power consumption

TTL interface capability at 3.3 V

Overvoltage tolerant control inputs to 5.5 V

High-impedance when V_CC(A) = 0 V

Complies with JEDEC standard no. JESD8B/JESD36

Latch-up performance meets requirements of JESD78 Class 1

ESD protection:

• HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

• CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

Multiple package options

Specified from -40 °C to +85 °C and -40 °C to +125 °C

High current

Three current gain selections

Trench MOSFET technology

Leadless ultra small and ultra thin SMD plastic package: 1.1 × 1.0 × 0.37 mm

Exposed drain pad for excellent thermal conduction

ElectroStatic Discharge (ESD) protection > 1 kV HBM

Drain-source on-state resistance R_DSon = 470 mΩ