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    HEF4021B
    HEF4021BT,653
    8-bit static shift register

    • Wide supply voltage range from 3.0 V to 15.0 V

    • CMOS low power dissipation

    • High noise immunity

    • Tolerant of slower rise and fall times

    • Fully static operation

    • 5 V, 10 V, and 15 V parametric ratings

    • Standardized symmetrical output characteristics

    • Complies with JEDEC standard JESD 13-B

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-B exceeds 200 V

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥1.0293

    500+:¥0.9357

    1000+:¥0.8912

    3000+:¥0.8487

    0
    数据手册
    74LVT125
    74LVTH125BQ,115
    3.3 V quad buffer; 3-state

    • Quad bus interface

    • 3-state buffers

    • Wide supply voltage range from 2.7 to 3.6 V

    • BiCMOS high speed and output drive

    • Output capability: +64 mA and -32 mA

    • Direct interface with TTL levels

    • Overvoltage tolerant inputs to 5.5 V

    • Bus hold data inputs eliminate need for external pull-up resistors to hold unused inputs

    • Live insertion and extraction permitted

    • No bus current loading when output is tied to 5 V bus

    • Power-up 3-state

    • IOFF circuitry provides partial Power-down mode operation

    • Latch-up performance exceeds 500 mA per JESD 78 Class II Level B

    • Complies with JEDEC standard JESD8C (2.7 V to 3.6 V)

    • ESD protection:

      • HBM EIA/JESD22-A114-A exceeds 2000V

      • MM EIA/JESD22-A115-A exceeds 200V

    • Specified from -40 °C to 85 °C

    1+:¥1.3921

    500+:¥1.2655

    1000+:¥1.2053

    3000+:¥1.1479

    0
    数据手册
    74LVC16244A
    74LVCH16244ADGG,11
    16-bit buffer/line driver; 5 V input/output tolerant; 3-state

    • Wide supply voltage range from 1.2 V to 3.6 V

    • 5 V tolerant inputs/outputs for interfacing with 5 V logic

    • IOFF circuitry provides partial Power-down mode operation

    • CMOS low power consumption

    • Multibyte flow-through standard pin-out architecture

    • Low inductance multiple power and ground pins for minimum noise and ground bounce

    • Direct interface with TTL levels

    • High-impedance when VCC = 0 V

    • All data inputs have bus hold. (74LVCH16244A only)

    • Complies with JEDEC standard:

      • JESD8-7A (1.65 V to 1.95 V)

      • JESD8-5A (2.3 V to 2.7 V)

      • JESD8-C/JESD36 (2.7 V to 3.6 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥3.6084

    500+:¥3.2804

    1000+:¥3.1242

    3000+:¥2.9754

    99,973,999
    数据手册
    74LVC573A
    74LVC573APW,118
    Octal D-type transparent latch with 5 V tolerant inputs/outputs; 3-state

    • Wide supply voltage range from 1.2 to 3.6 V

    • Overvoltage tolerant inputs to 5.5 V

    • CMOS low power consumption

    • Direct interface with TTL levels

    • IOFF circuitry provides partial Power-down mode operation

    • High-impedance when VCC = 0 V

    • Flow-through pinout architecture

    • Complies with JEDEC standard:

      • JESD8-7A (1.65 V to 1.95 V)

      • JESD8-5A (2.3 V to 2.7 V)

      • JESD8-C/JESD36 (2.7 V to 3.6 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥0.9649

    500+:¥0.8772

    99,999,999
    数据手册
    74LVC2G86
    74LVC2G86DC,125
    Dual 2-input EXCLUSIVE-OR gate

    • Wide supply voltage range from 1.65 V to 5.5 V

    • Overvoltage tolerant inputs to 5.5 V

    • High noise immunity

    • CMOS low-power dissipation

    • ±24 mA output drive (VCC = 3.0 V)

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥1.1774

    500+:¥1.0704

    1000+:¥1.0194

    3000+:¥0.9709

    0
    数据手册
    74LVC1G10
    74LVC1G10GW,125
    Single 3-input NAND gate

    • Wide supply voltage range from 1.65 V to 5.5 V

    • High noise immunity

    • ±24 mA output drive (VCC = 3.0 V)

    • CMOS low power dissipation

    • Latch-up performance exceeds 250 mA

    • Direct interface with TTL levels

    • Inputs accept voltages up to 5 V

    • IOFF circuitry provides partial Power-down mode operation

    • Complies with JEDEC standard:

      • JESD8-7 (1.65 V to 1.95 V)

      • JESD8-5 (2.3 V to 2.7 V)

      • JESD8C (2.7 V to 3.6 V)

      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥0.2608

    500+:¥0.2371

    1000+:¥0.2258

    3000+:¥0.2151

    0
    数据手册
    74LVC157A
    74LVC157AD,118
    Quad 2-input multiplexer

    • Overvoltage tolerant inputs to 5.5 V

    • Wide supply voltage range from 1.2 V to 3.6 V

    • CMOS low power consumption

    • Direct interface with TTL levels

    • Complies with JEDEC standard:

      • JESD8-7A (1.65 V to 1.95 V)

      • JESD8-5A (2.3 V to 2.7 V)

      • JESD8-C/JESD36 (2.7 V to 3.6 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥0.7245

    500+:¥0.6586

    1000+:¥0.6273

    3000+:¥0.5974

    0
    数据手册
    74LVC14A
    74LVC14ABQ,115
    Hex inverting Schmitt trigger with 5 V tolerant input

    • Wide supply voltage range from 1.2 V to 3.6 V

    • Overvoltage tolerant inputs to 5.5 V

    • CMOS low-power consumption

    • Direct interface with TTL levels

    • Unlimited input rise and fall times

    • Complies with JEDEC standard JESD8-C/JESD36 (2.7 V to 3.6 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥0.7867

    500+:¥0.7152

    1000+:¥0.6812

    3000+:¥0.6487

    99,972,999
    数据手册
    74LVC125A
    74LVC125ABQ,115
    Quad buffer/line driver with 5 V tolerant input/outputs; 3-state

    • Overvoltage tolerant inputs to 5.5 V

    • Wide supply voltage range from 1.2 V to 3.6 V

    • CMOS low power consumption

    • Direct interface with TTL levels

    • Complies with JEDEC standard:

      • JESD8-7A (1.65 V to 1.95 V)

      • JESD8-5A (2.3 V to 2.7 V)

      • JESD8-C/JESD36 (2.7 V to 3.6 V)

    • IOFF circuitry provides partial Power-down mode operation

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥0.7867

    500+:¥0.7152

    1000+:¥0.6812

    3000+:¥0.6487

    99,999,999
    数据手册
    74LVC07A
    74LVC07AD,118
    Hex buffer with open-drain outputs

    • 5 V tolerant inputs and outputs (open-drain) for interfacing with 5 V logic

    • Wide supply voltage range from 1.2 V to 5.5 V

    • CMOS low power consumption

    • Direct interface with TTL levels

    • Overvoltage tolerant inputs to 5.5 V

    • Complies with JEDEC standard:

      • JESD8-7A (1.65 V to 1.95 V)

      • JESD8-5A (2.3 V to 2.7 V)

      • JESD8-C/JESD36 (2.7 V to 3.6 V)

    • ESD protection:

      • HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V

      • CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥0.5785

    500+:¥0.5259

    1000+:¥0.5009

    3000+:¥0.4770

    0
    数据手册
    74LV393
    74LV393PW,118
    Dual 4-bit binary ripple counter

    • Optimized for low voltage applications: 1.0 V to 3.6 V

    • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V

    • Typical VOLP (output ground bounce) 0.8 V at VCC = 3.3 V, Tamb = 25 °C

    • Typical VOHV (output VOH undershoot) 2 V at VCC = 3.3 V, Tamb = 25 °C

    • Two 4-bit binary counters with individual clocks

    • Divide-by any binary module up to 28 in one package

    • Two master resets to clear each 4-bit counter individually

    • Complies with JEDEC standard no. 7A

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    1+:¥0.8189

    500+:¥0.7445

    1000+:¥0.7090

    3000+:¥0.6753

    0
    数据手册
    74LV14
    74LV14D,118
    Hex inverting Schmitt trigger

    • Wide supply voltage range from 1.0 V to 5.5 V

    • CMOS low power dissipation

    • Optimized for low voltage applications: 1.0 V to 3.6 V

    • Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V

    • Typical output ground bounce < 0.8 V at VCC = 3.3 V and Tamb = 25 °C

    • Typical HIGH-level output voltage (VOH) undershoot: > 2 V at VCC = 3.3 V and Tamb = 25 °C

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
    • Complies with JEDEC standards:
      • JESD8-7 (1.65 V to 1.95 V)
      • JESD8-5 (2.3 V to 2.7 V)
      • JESD8C (2.7 V to 3.6 V)
      • JESD36 (4.5 V to 5.5 V)

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥0.9445

    500+:¥0.8586

    1000+:¥0.8178

    3000+:¥0.7788

    0
    数据手册
    74HC541
    74HCT541PW,118
    Octal buffer/line driver; 3-state

    • Wide supply voltage range from 2.0 to 6.0 V

    • CMOS low power dissipation

    • High noise immunity

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • Non-Inverting outputs

    • Complies with JEDEC standards:

      • JESD8C (2.7 V to 3.6 V)

      • JESD7A (2.0 V to 6.0 V)

    • Input levels:

      • For 74HC541: CMOS levels

      • For 74HCT541: TTL levels

    • ESD protection:

      • HBM JESD22-A114F exceeds 2 kV

      • MM JESD22-A115-A exceeds 200 V

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥1.0626

    500+:¥0.9660

    1000+:¥0.9200

    3000+:¥0.8762

    99,999,999
    数据手册
    74HC244
    74HCT244PW,118
    Octal buffer/line driver; 3-state

    • Wide supply voltage range from 2.0 to 6.0 V

    • CMOS low power dissipation

    • High noise immunity

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • Input levels:

      • For 74HC244: CMOS level

      • For 74HCT244: TTL level

    • Octal bus interface

    • Non-inverting 3-state outputs

    • Complies with JEDEC standards:

      • JESD8C (2.7 V to 3.6 V)

      • JESD7A (2.0 V to 6.0 V)

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥0.9273

    500+:¥0.8430

    1000+:¥0.8029

    3000+:¥0.7647

    0
    数据手册
    74HC00
    74HCT00PW,118
    Quad 2-input NAND gate

    • Wide supply voltage range from 2.0 to 6.0 V

    • CMOS low power dissipation

    • High noise immunity

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • Input levels:

      • For 74HC00: CMOS level

      • For 74HCT00: TTL level

    • Complies with JEDEC standards:

      • JESD8C (2.7 V to 3.6 V)

      • JESD7A (2.0 V to 6.0 V)

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥0.5495

    500+:¥0.4996

    1000+:¥0.4758

    3000+:¥0.4531

    99,997,499
    数据手册
    74HC86
    74HC86D,653
    Quad 2-input EXCLUSIVE-OR gate

    • Wide supply voltage range from 2.0 V to 6.0 V

    • CMOS low power dissipation

    • High noise immunity

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • Complies with JEDEC standards:

      • JESD8C (2.7 V to 3.6 V)
      • JESD7A (2.0 V to 6.0 V)

    • Input levels:

      • For 74HC86: CMOS level

      • For 74HCT86: TTL level

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥0.5935

    500+:¥0.5396

    1000+:¥0.5139

    99,484,999
    数据手册
    74HC4514
    74HC4514PW,118
    4-to-16 line decoder/demultiplexer with input latches

    • Wide supply voltage range from 2.0 to 6.0 V

    • CMOS low power dissipation

    • High noise immunity

    • Input levels:

      • For 74HC4514: CMOS level

      • For 74HCT4514: TTL level

    • 16-line demultiplexing capability

    • Decodes 4 binary-coded inputs into 16 mutually-exclusive outputs

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • Complies with JEDEC standards

      • JESD8C (2.7 V to 3.6 V)

      • JESD7A (2.0 V to 6.0 V)

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Specified from -40 °C to +85 °C and -40 °C to +125 °C

    1+:¥3.3197

    500+:¥3.0179

    1000+:¥2.8742

    3000+:¥2.7374

    99,999,999
    数据手册
    74HC(T)423
    74HC423D,653
    Dual retriggerable monostable multivibrator with reset

    • DC triggered from active HIGH or active LOW inputs

    • Retriggerable for very long pulses up to 100 % duty factor

    • Direct reset terminates output pulse

    • Schmitt-trigger action on all inputs except for the reset input

    • Complies with JEDEC standard no. 7A

    • Input levels:

      • For 74HC423: CMOS level

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    ¥1.6758

    99,999,999
    数据手册
    74HC4017
    74HC4017D,653
    Johnson decade counter with 10 decoded outputs

    • Wide supply voltage range from 2.0 V to 6.0 V

    • CMOS low power dissipation

    • High noise immunity

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • Complies with JEDEC standards:

      • JESD8C (2.7 V to 3.6 V)
      • JESD7A (2.0 V to 6.0 V)

    • Input levels:

      • For 74HC4017: CMOS level

      • For 74HCT4017: TTL level

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V

    • Multiple package options

    • Specified from -40 °C to +85 °C and from -40 °C to +125 °C

    1+:¥1.3728

    500+:¥1.2480

    1000+:¥1.1885

    3000+:¥1.1319

    0
    数据手册
    74HC393
    74HC393D,653
    Dual 4-bit binary ripple counter

    • Wide supply voltage range from 2.0 V to 6.0 V

    • CMOS low power dissipation

    • High noise immunity

    • Latch-up performance exceeds 100 mA per JESD 78 Class II Level B

    • Complies with JEDEC standards:

      • JESD8C (2.7 V to 3.6 V)
      • JESD7A (2.0 V to 6.0 V)

    • Input levels:

      • For 74HC393: CMOS level

      • For 74HCT393: TTL level

    • ESD protection:

      • HBM JESD22-A114F exceeds 2000 V

      • MM JESD22-A115-A exceeds 200 V.

    • Two 4-bit binary counters with individual clocks

    • Divide by any binary module up to 28 in one package

    • Two master resets to clear each 4-bit counter individually

    1+:¥0.8050

    500+:¥0.7318

    1000+:¥0.6970

    3000+:¥0.6638

    0
    数据手册