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HEF4094BT,6538-stage shift-and-store registerFully static operation
5 V, 10 V, and 15 V parametric ratings
Wide supply voltage range from 3.0 to 15.0 V
CMOS low power dissipation
High noise immunity
Standardized symmetrical output characteristics
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF; R = 0 Ω)
Complies with JEDEC standard JESD 13-B
Specified from -40 °C to +85 °C and -40 °C to +125 °C
1+:¥0.8224
500+:¥0.7476
1000+:¥0.7120
3000+:¥0.6781
- 175,000
- 2524+
- 数据手册
HEF4093BT,653Quad 2-input NAND Schmitt triggerSchmitt trigger input discrimination
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Wide supply voltage range from 3.0 V to 15.0 V
CMOS low power dissipation
High noise immunity
Standardized symmetrical output characteristics
Complies with JEDEC standard JESD 13-B
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-B exceeds 200 V
Specified from -40 °C to +85 °C and -40 °C to +125 °C
1+:¥0.7694
500+:¥0.6994
1000+:¥0.6661
3000+:¥0.6344
- 300,000
- 2524+
- 数据手册
74LVC1G125GV,125Bus buffer/line driver; 3-stateWide supply voltage range from 1.65 V to 5.5 V
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low power consumption
IOFF circuitry provides partial Power-down mode operation
±24 mA output drive (VCC = 3.0 V)
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Complies with JEDEC standards:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
1+:¥0.2603
500+:¥0.2366
1000+:¥0.2253
3000+:¥0.2146
- 181,300
- 2422+
- 数据手册
限量供应
74HC164PW,1188-bit serial-in, parallel-out shift registerWide supply voltage range from 2.0 to 6.0 V
CMOS low power dissipation
High noise immunity
Input levels:
For 74HC164: CMOS level
For 74HCT164: TTL level
Gated serial data inputs
Asynchronous master reset
Complies with JEDEC standards
JESD8C (2.7 V to 3.6 V)
JESD7A (2.0 V to 6.0 V)
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C.
1+:¥0.6653
500+:¥0.6048
1000+:¥0.5760
3000+:¥0.5486
- 47,500
- 2515+
- 数据手册
HEF4050BT,653Hex non-inverting buffersAccepts input voltages in excess of the supply voltage
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Specified from -40 °C to +85 °C
Complies with JEDEC standard JESD 13-B
1+:¥1.0163
500+:¥0.9239
1000+:¥0.8799
3000+:¥0.8380
- 42,500
- 2434+
- 数据手册
74VHCT541BQ,115Octal buffer/line driver; 3-stateBalanced propagation delays
All inputs have a Schmitt-trigger action
Inputs accepts voltages higher than VCC
The 74VHC541 operates with CMOS input level
The 74VHCT541 operates with TTL input level
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
1+:¥1.7062
500+:¥1.5511
1000+:¥1.4772
3000+:¥1.4069
- 39,000
- 2522+
- 数据手册
74HC21D,653Dual 4-input AND gateWide supply voltage range from 2.0 to 6.0 V
CMOS low power dissipation
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
CMOS input levels
Complies with JEDEC standards:
JESD8C (2.7 V to 3.6 V)
JESD7A (2.0 V to 6.0 V)
- ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from -40 °C to +85 °C and from -40 °C to +125 °C.
1+:¥0.8031
500+:¥0.7301
1000+:¥0.6953
3000+:¥0.6622
- 20,000
- 数据手册
74LVC2G00DC,125Dual 2-input NAND gateWide supply voltage range from 1.65 V to 5.5 V
5 V tolerant outputs for interfacing with 5 V logic
High noise immunity
±24 mA output drive (VCC = 3.0 V)
CMOS low power dissipation
IOFF circuitry provides partial Power-down mode operation
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Overvoltage tolerant inputs to 5.5 V
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
1+:¥1.1786
500+:¥1.0714
1000+:¥1.0204
3000+:¥0.9718
- 18,000
- 2424+
- 数据手册
74HC00D,653Quad 2-input NAND gateWide supply voltage range from 2.0 to 6.0 V
CMOS low power dissipation
High noise immunity
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Input levels:
For 74HC00: CMOS level
For 74HCT00: TTL level
Complies with JEDEC standards:
JESD8C (2.7 V to 3.6 V)
JESD7A (2.0 V to 6.0 V)
- ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
1+:¥0.5387
500+:¥0.4897
1000+:¥0.4664
3000+:¥0.4442
- 17,420
- 2512+
- 数据手册
74LVC2G86GT,115Dual 2-input EXCLUSIVE-OR gateWide supply voltage range from 1.65 V to 5.5 V
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low-power dissipation
±24 mA output drive (VCC = 3.0 V)
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
- IOFF circuitry provides partial Power-down mode operation
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
1+:¥0.6244
500+:¥0.5677
1000+:¥0.5406
3000+:¥0.5149
5000+:¥0.4555
15000+:¥0.4555
- 15,000
- 2352+
- 数据手册
限量供应
74HC4094PW,1188-stage shift-and-store bus registerComplies with JEDEC standard JESD7A
Input levels:
For 74HC4094: CMOS level
For 74HCT4094: TTL level
Low-power dissipation
ESD protection:
HBM JESD22-A114F exceeds 2 kV
MM JESD22-A115-A exceeds 200 V
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
1+:¥0.9531
500+:¥0.8665
1000+:¥0.8252
2500+:¥0.4667
3000+:¥0.7859
12500+:¥0.4667
- 12,500
- 2342+
- 数据手册
限量供应
74LVT245D,1183.3 V octal transceiver with direction pin; 3-stateWide supply voltage range from 2.7 to 3.6 V
3-state buffers
Octal bidirectional bus interface
Overvoltage tolerant inputs to 5.5 V
Direct interface with TTL levels
BiCMOS high speed and output drive
Output capability: +64 mA/-32 mA
Latch-up protection exceeds 500 mA per JESD78 class II level A
Bus-hold data inputs eliminate the need for external pull-up resistors for unused inputs
No bus current loading when output is tied to 5 V bus
Live insertion/extraction permitted
Power-up 3-state
IOFF circuitry provides partial Power-down mode operation
Complies with JEDEC standards JESD8C (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Specified from -40 °C to 85 °C
1+:¥2.1296
500+:¥1.9360
1000+:¥1.8438
2000+:¥0.7694
3000+:¥1.7560
10000+:¥0.7694
- 10,000
- 2348+
- 数据手册
限量供应
74LVC2G38GXXDual 2-input NAND gate; open drainWide supply voltage range from 1.65 V to 5.5 V
5 V tolerant outputs for interfacing with 5 V logic
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low power dissipation
IOFF circuitry provides partial Power-down mode operation
±24 mA output drive (VCC = 3.0 V)
Open-drain outputs
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
1+:¥1.3734
500+:¥1.2486
1000+:¥1.1891
3000+:¥1.1325
10000+:¥0.4715
- 10,000
- 2325+
- 数据手册
限量供应
74LVC2G32GXXDual 2-input OR gateWide supply voltage range from 1.65 V to 5.5 V
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low power dissipation
5 V tolerant outputs in the Power-down mode
±24 mA output drive (VCC = 3.0 V)
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
IOFF circuitry provides partial Power-down mode operation
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
1+:¥1.3734
500+:¥1.2486
1000+:¥1.1891
3000+:¥1.1325
10000+:¥0.4715
- 10,000
- 2231+
- 数据手册
限量供应
74LVC2G08GXXDual 2-input AND gateWide supply voltage range from 1.65 V to 5.5 V
5 V tolerant outputs for interfacing with 5 V logic
Overvoltage tolerant inputs to 5.5 V
IOFF circuitry provides partial Power-down mode operation
High noise immunity
±24 mA output drive (VCC = 3.0 V)
CMOS low power dissipation
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V)
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
1+:¥0.6262
500+:¥0.5693
1000+:¥0.5422
3000+:¥0.4695
10000+:¥0.3506
- 10,000
- 2326+
- 数据手册
限量供应
74LVC1G86GX,1252-input EXCLUSIVE-OR gateWide supply voltage range from 1.65 V to 5.5 V
High noise immunity
Overvoltage tolerant inputs to 5.5 V
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
±24 mA output drive (VCC = 3.0 V)
CMOS low power dissipation
Latch-up performance exceeds 250 mA
IOFF circuitry provides partial Power-down mode operation
Direct interface with TTL levels
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
1+:¥0.4693
500+:¥0.4267
1000+:¥0.4064
3000+:¥0.3870
10000+:¥0.2894
- 10,000
- 2323+
- 数据手册
限量供应
74LVC1G38GX,1252-input NAND gate; open drainWide supply voltage range from 1.65 V to 5.5 V
5 V tolerant outputs for interfacing with 5 V logic
High noise immunity
±24 mA output drive (VCC = 3.0 V)
CMOS low power consumption
Open drain outputs
Direct interface with TTL levels
Inputs accept voltages up to 5 V
Latch-up performance exceeds 250 mA
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8-B/JESD36 (2.7 V to 3.6 V).
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +125 °C.
1+:¥0.4806
500+:¥0.4369
1000+:¥0.4161
3000+:¥0.3963
10000+:¥0.3506
- 10,000
- 2211+
- 数据手册
限量供应
74LVC1G240GXHSingle inverting buffer/line driver; 3-stateWide supply voltage range from 1.65 V to 5.5 V
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low power dissipation
IOFF circuitry provides partial Power-down mode operation
±24 mA output drive (VCC = 3.0 V)
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
- Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
1+:¥0.7571
500+:¥0.6883
1000+:¥0.6555
3000+:¥0.6243
10000+:¥0.2599
- 10,000
- 2306+
- 数据手册
限量供应
74LVC1G17GX4ZSingle Schmitt trigger bufferWide supply voltage range from 1.65 V to 5.5 V
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low power dissipation
IOFF circuitry provides partial Power-down mode operation
±24 mA output drive (VCC = 3.0 V)
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Unlimited rise and fall times
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
1+:¥0.6327
500+:¥0.5752
1000+:¥0.5478
3000+:¥0.5217
10000+:¥0.2171
- 10,000
- 2216+
- 数据手册
限量供应
74LVC1G17GX,125Single Schmitt trigger bufferWide supply voltage range from 1.65 V to 5.5 V
Overvoltage tolerant inputs to 5.5 V
High noise immunity
CMOS low power dissipation
IOFF circuitry provides partial Power-down mode operation
±24 mA output drive (VCC = 3.0 V)
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Unlimited rise and fall times
Complies with JEDEC standard:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
JESD36 (4.5 V to 5.5 V)
ESD protection:
HBM: ANSI/ESDA/JEDEC JS-001 class 2 exceeds 2000 V
CDM: ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
1+:¥0.4693
500+:¥0.4267
1000+:¥0.4064
3000+:¥0.3870
10000+:¥0.3506
- 10,000
- 2248+
- 数据手册
限量供应