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商品编号:
74VHC125PW,118
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批次:
2235+
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简述:
Quad buffer/line driver; 3-state
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描述:
The 74VHC125; 74VHCT125 are high-speed Si-gate CMOS devices and are pin compatible with Low-power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard JESD7-A.
The 74VHC125; 74VHCT125 provides four non-inverting buffer/line drivers with 3-state outputs. The 3-state outputs (nY) are controlled by the output enable input (nOE). A HIGH at nOE causes the outputs to assume a high-impedance OFF-state.
The 74VHC125; 74VHCT125 are identical to the 74VHC126; 74VHCT126 but have active LOW enable inputs.
- 数据手册:
特性
Balanced propagation delays
All inputs have a Schmitt-trigger action
Inputs accepts voltages higher than VCC
Input levels:
The 74VHC125 operates with CMOS logic levels
The 74VHCT125 operates with TTL logic levels
ESD protection:
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
Multiple package options
Specified from -40 °C to +85 °C and from -40 °C to +125 °C
