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商品编号:
74LVT16543ADGG,118
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简述:
3.3 V 16-bit registered transceiver; 3-state
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描述:
The 74LVT16543A is a 16-bit registered transceiver with 3-state outputs. The device can be used as two 8-bit transceivers or one 16-bit transceiver.
Data flow in each direction is controlled by intput enable (nEAB and nEBA), latch enable (nLEAB and nLEBA), and output enable (nOEAB and nOEBA) inputs. For A to B data flow, the device operates in the transparent mode when (nEAB) and (nLEAB) are LOW. A subsequent LOW-to-HIGH transition of the nLEAB input latches the data and the outputs no longer change with the inputs. A HIGH on either nEAB or nOEAB causes the outputs to assume a high-impedance OFF-state.
Control of data flow from B to A is similar, but using the nEBA, nLEBA, and nOEBA inputs. Bus hold data inputs eliminate the need for external pull-up resistors to define unused inputs
- 数据手册:
特性
16-bit universal bus interface
3-state buffers
Wide supply voltage range from 2.7 to 3.6 V
Input and output interface capability to systems at 5 V supply
Overvoltage tolerant inputs to 5.5 V
Direct interface with TTL levels
BiCMOS high speed and output drive
Output capability: +64 mA/-32 mA
Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs
Live insertion/extraction permitted
Power-up 3-state
Power-up reset
No bus current loading when output is tied to 5 V bus
IOFF circuitry provides partial Power-down mode operation
Latch-up performance exceeds 500 mA per JESD 78 Class II Level B
Complies with JEDEC standards
JESD8C (2.7 V to 3.6 V)
ESD protection:
HBM: JESD22-A114F exceeds 2000 V
MM: JESD22-A115-A exceeds 200 V
