图像仅供参考
请参阅产品规格
-
商品编号:
74AVCH1T45GW,125
-
简述:
Dual-supply voltage level translator/transceiver; 3-state
-
描述:
The 74AVCH1T45 is a single bit, dual supply transceiver that enables bidirectional level translation. The 74AVCH1T45 has active bus hold circuitry which is provided to hold unused or floating data inputs at a valid logic level. This feature eliminates the need for external pull-up or pull-down resistors.The device is fully specified for partial power-down applications using IOFF. The IOFF circuitry disables the output, preventing potentially damaging backflow current through the device when it is powered down.
- 数据手册:
特性
Wide supply voltage range from 0.8 V to 3.6 V
High noise immunity
CMOS low power dissipation
Overvoltage tolerant inputs to 3.6 V
Dynamically controlled outpus
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114E Class 3B exceeds 8000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
Maximum data rates:
500 Mbit/s (1.8 V to 3.3 V translation)
320 Mbit/s (< 1.8 V to 3.3 V translation)
320 Mbit/s (translate to 2.5 V or 1.8 V)
280 Mbit/s (translate to 1.5 V)
240 Mbit/s (translate to 1.2 V)
Suspend mode
Bus hold on data inputs
Latch-up performance exceeds 100 mA per JESD 78 Class II
Low noise overshoot and undershoot < 10 % of VCC
IOFF circuitry provides partial Power-down mode operation
Multiple package options
Specified from -40 °C to +85 °C and -40 °C to +125 °C
