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请参阅产品规格
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商品编号:
74ALVCH16373DGG:11
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简述:
2.5 V/3.3 V 16-bit D-type transparent latch; 3-state
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描述:
The 74ALVCH16373 is a 16-bit D-type transparent latch with bus hold inputs and 3-state outputs. The device can be used as two 8-bit transparent latches or a single 16-bit transparent latch. The device features two latch enables (1LE and 2LE) and two output enables (1OE and 2OE), each controlling 8-bits. When nLE is HIGH, data at the inputs enter the latches. In this condition the latches are transparent, a latch output will change each time its corresponding D-input changes. When nLE is LOW the latches store the information that was present at the inputs a set-up time preceding the HIGH-to-LOW transition of nLE. A HIGH on nOE causes the outputs to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of the latches.
This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down.
- 数据手册:
特性
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power dissipation
MULTIBYTE™ flow-through standard pin-out architecture
Low inductance multiple VCC and GND pins for minimum noise and ground bounce
Direct interface with TTL levels
All data inputs have bus hold
Latch-up performance exceeds 100 mA per JESD78 Class II.A
Output drive capability 50 Ω transmission lines at 85 °C
Current drive ±24 mA at VCC = 3.0 V
- Complies with JEDEC standards:
JESD8-7 (1.65 V to 1.95 V)
JESD8-5 (2.3 V to 2.7 V)
JESD8C/JESD36 (2.7 V to 3.6 V)
ESD protection:
- HBM ANSI/ESDA/JEDEC JS-001 Class 2 exceeds 2 kV
- CDM ANSI/ESDA/JEDEC JS-002 Class C3 exceeds 1 kV
- Specified from -40 °C to +85 °C and from -40 °C to +125 °C
