图像仅供参考
请参阅产品规格
-
商品编号:
74HCS164D-Q100J
-
简述:
8-bit serial-in, parallel-out shift register
-
描述:
The 74HCS164-Q100 is an 8-bit serial-in/parallel-out shift register. The device features two serial
data inputs (DSA and DSB), eight parallel data outputs (Q0 to Q7). Data is entered serially through
DSA or DSB and either input can be used as an active HIGH enable for data entry through the
other input. Data is shifted on the LOW-to-HIGH transitions of the clock (CP) input. A LOW on the
master reset input (MR) clears the register and forces all outputs LOW, independently of other
inputs. Inputs include clamp diodes. This enables the use of current limiting resistors to interface
inputs to voltages in excess of VCC.
All inputs are Schmitt-trigger inputs, capable of transforming slowly changing input signals into
sharply defined, jitter-free output signals.
This product has been qualified to the Automotive Electronics Council (AEC) standard Q100
(Grade 1) and is suitable for use in automotive applications. - 数据手册:
特性
• Automotive product qualification in accordance with AEC-Q100 (Grade 1)
• Specified from -40 °C to +85 °C and from -40 °C to +125 °C
• Wide supply voltage range from 2.0 V to 6.0 V
• Schmitt-trigger inputs
• Low power consumption
• Typical supply current (ICC) of 100 nA
• Typical input leakage current (II) of ±10 nA
• ±7.8 mA output drive at 6 V
• 8-bit serial input and 8-bit serial or parallel output
• Storage register with 3-state outputs
• Shift register with direct clear
• Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
• Complies with JEDEC standards:
• JESD7A (2.0 V to 6.0 V)
• ESD protection:
• HBM ANSI/ESDA/JEDEC JS-001 class 3A exceeds 4000 V
• CDM ANSI/ESDA/JEDEC JS-002 class C3 exceeds 1500 V
• Multiple package options
目标应用
• Serial-to-parallel data conversion
• Remote control holding register
• Output expansion
• LED matrix control
• 7-segment display control
• 8-bit data storage