模拟和逻辑IC
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- 描述
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- 数据手册
- 操作
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74HCS32BQX74HCS32BQX74HCS32BQXQuad 2-input OR gate with Schmitt-trigger inputs
库存: 30001+: ¥0.4905500+: ¥0.44591000+: ¥0.42473000+: ¥0.40451+: ¥0.4905500+: ¥0.44591000+: ¥0.42473000+: ¥0.40453000 -
74AUP1G374GW,12574AUP1G37474AUP1G374GW,125Low-power D-type flip-flop; positive-edge trigger; 3-state库存: 01+: ¥0.5002500+: ¥0.45471000+: ¥0.43303000+: ¥0.41241+: ¥0.5002500+: ¥0.45471000+: ¥0.43303000+: ¥0.41240 -
74AUP2G0604GWH74AUP2G060474AUP2G0604GWHLow-power inverting buffer with open-drain and inverter库存: 01+: ¥0.4980500+: ¥0.45271000+: ¥0.43123000+: ¥0.41061+: ¥0.4980500+: ¥0.45271000+: ¥0.43123000+: ¥0.41060 -
74AUP2G07GW,12574AUP2G0774AUP2G07GW,125Low-power dual buffer with open-drain output库存: 01+: ¥0.4980500+: ¥0.45271000+: ¥0.43123000+: ¥0.41061+: ¥0.4980500+: ¥0.45271000+: ¥0.43123000+: ¥0.41060 -
74HC14PW,11874HC1474HC14PW,118Hex inverting Schmitt trigger库存: 01+: ¥0.5002500+: ¥0.45471000+: ¥0.43303000+: ¥0.41241+: ¥0.5002500+: ¥0.45471000+: ¥0.43303000+: ¥0.41240 -
74LVC2G07GV,12574LVC2G0774LVC2G07GV,125Buffers with open-drain outputs库存: 01+: ¥0.5002500+: ¥0.45471000+: ¥0.43303000+: ¥0.41241+: ¥0.5002500+: ¥0.45471000+: ¥0.43303000+: ¥0.41240 -
74HCS74PWJ74HCS74PW74HCS74PWJDual D-type flip-flop with Schmitt-trigger inputs; set and reset; positive edge-trigger库存: 01+: ¥0.5002500+: ¥0.45471000+: ¥0.43303000+: ¥0.41241+: ¥0.5002500+: ¥0.45471000+: ¥0.43303000+: ¥0.41240
